December 31, 2018 Thesis Open Access

Eyob Gedlie

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  <dc:creator>Eyob Gedlie</dc:creator>
  <dc:date>2018-12-31</dc:date>
  <dc:description>The implementation of neural systems is presented in this paper. The thesis focuses on
implementations where the algorithms and their physical support are tightly coupled. This thesis
describes a neural network intelligent, application, soft-algorithm to implement to hardware
electronics device. With the emerging of Integrated Circuit, any design with large number of
electronic components can be squeezed into a tiny chip area with minimum power requirements,
which leads to integration of innumerable applications so as to design any electronic consumer
product initiated in the era of digital convergence. One has many choices for selecting either of
these reconfigurable techniques based on Speed, Gate Density, Development, Prototyping,
simulation time and cost. This thesis describes the implementation in hardware of an Artificial
Neural Network with an Electronic circuit made up of Op-amps. The implementation of a Neural
Network in hardware can be desired to benefit from its distributed processing capacity or to avoid
using a personal computer attached to each implementation. The hardware implementation is based
in a Feed Forward Neural Network, with a hyperbolic tangent as activation function, with floating
point notation of single precision. The device used was an electronic circuit made with Op-amps
The Proteus Software version 8.0 was used to validate the implementation results of the hardware
circuit. The results show that the implementation does not introduce a noticeable loss of precision
but is slower than the software implementation running in a PC.</dc:description>
  <dc:identifier>https://zenodo.org/record/5730</dc:identifier>
  <dc:identifier>10.20372/nadre:5730</dc:identifier>
  <dc:identifier>oai:zenodo.org:5730</dc:identifier>
  <dc:relation>doi:10.20372/nadre:5729</dc:relation>
  <dc:relation>url:https://nadre.ethernet.edu.et/communities/aau</dc:relation>
  <dc:relation>url:https://nadre.ethernet.edu.et/communities/zenodo</dc:relation>
  <dc:rights>info:eu-repo/semantics/openAccess</dc:rights>
  <dc:rights>http://www.opendefinition.org/licenses/cc-by</dc:rights>
  <dc:title>Investigation of Soft Neural Network Algorithm Implement to Analog Electronics Devices</dc:title>
  <dc:type>info:eu-repo/semantics/doctoralThesis</dc:type>
  <dc:type>publication-thesis</dc:type>
</oai_dc:dc>