December 31, 2018 Thesis Open Access

Eyob Gedlie

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{
  "description": "<p>The implementation of neural systems is presented in this paper. The thesis focuses on<br>\nimplementations where the algorithms and their physical support are tightly coupled. This thesis<br>\ndescribes a neural network intelligent, application, soft-algorithm to implement to hardware<br>\nelectronics device. With the emerging of Integrated Circuit, any design with large number of<br>\nelectronic components can be squeezed into a tiny chip area with minimum power requirements,<br>\nwhich leads to integration of innumerable applications so as to design any electronic consumer<br>\nproduct initiated in the era of digital convergence. One has many choices for selecting either of<br>\nthese reconfigurable techniques based on Speed, Gate Density, Development, Prototyping,<br>\nsimulation time and cost. This thesis describes the implementation in hardware of an Artificial<br>\nNeural Network with an Electronic circuit made up of Op-amps. The implementation of a Neural<br>\nNetwork in hardware can be desired to benefit from its distributed processing capacity or to avoid<br>\nusing a personal computer attached to each implementation. The hardware implementation is based<br>\nin a Feed Forward Neural Network, with a hyperbolic tangent as activation function, with floating<br>\npoint notation of single precision. The device used was an electronic circuit made with Op-amps<br>\nThe Proteus Software version 8.0 was used to validate the implementation results of the hardware<br>\ncircuit. The results show that the implementation does not introduce a noticeable loss of precision<br>\nbut is slower than the software implementation running in a PC.</p>", 
  "license": "http://www.opendefinition.org/licenses/cc-by", 
  "creator": [
    {
      "@type": "Person", 
      "name": "Eyob Gedlie"
    }
  ], 
  "headline": "Investigation of Soft Neural Network Algorithm Implement to Analog Electronics Devices", 
  "image": "https://zenodo.org/static/img/logos/zenodo-gradient-round.svg", 
  "datePublished": "2018-12-31", 
  "url": "https://nadre.ethernet.edu.et/record/5730", 
  "@context": "https://schema.org/", 
  "identifier": "https://doi.org/10.20372/nadre:5730", 
  "@id": "https://doi.org/10.20372/nadre:5730", 
  "@type": "ScholarlyArticle", 
  "name": "Investigation of Soft Neural Network Algorithm Implement to Analog Electronics Devices"
}