Thesis Open Access
Eyob Gedlie
{
"DOI": "10.20372/nadre:5730",
"author": [
{
"family": "Eyob Gedlie"
}
],
"issued": {
"date-parts": [
[
2018,
12,
31
]
]
},
"abstract": "<p>The implementation of neural systems is presented in this paper. The thesis focuses on<br>\nimplementations where the algorithms and their physical support are tightly coupled. This thesis<br>\ndescribes a neural network intelligent, application, soft-algorithm to implement to hardware<br>\nelectronics device. With the emerging of Integrated Circuit, any design with large number of<br>\nelectronic components can be squeezed into a tiny chip area with minimum power requirements,<br>\nwhich leads to integration of innumerable applications so as to design any electronic consumer<br>\nproduct initiated in the era of digital convergence. One has many choices for selecting either of<br>\nthese reconfigurable techniques based on Speed, Gate Density, Development, Prototyping,<br>\nsimulation time and cost. This thesis describes the implementation in hardware of an Artificial<br>\nNeural Network with an Electronic circuit made up of Op-amps. The implementation of a Neural<br>\nNetwork in hardware can be desired to benefit from its distributed processing capacity or to avoid<br>\nusing a personal computer attached to each implementation. The hardware implementation is based<br>\nin a Feed Forward Neural Network, with a hyperbolic tangent as activation function, with floating<br>\npoint notation of single precision. The device used was an electronic circuit made with Op-amps<br>\nThe Proteus Software version 8.0 was used to validate the implementation results of the hardware<br>\ncircuit. The results show that the implementation does not introduce a noticeable loss of precision<br>\nbut is slower than the software implementation running in a PC.</p>",
"title": "Investigation of Soft Neural Network Algorithm Implement to Analog Electronics Devices",
"type": "thesis",
"id": "5730"
}
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